TPS51200DRCR 3A Sink/Source DDR Termination Regulator for VDDQ=1.5V/1.8V/2.5V with VTT=±0.5% Accuracy Reference Buffer & Low IQ in 2mmx2mm SON-10

TPS51200DRCR 3A Sink/Source DDR Termination Regulator for VDDQ=1.5V/1.8V/2.5V with VTT=±0.5% Accuracy Reference Buffer & Low IQ in 2mmx2mm SON-10

Features

• Input voltage: supports 2.5v rail and 3.3v rail

• VLDOIN voltage range: 1.1V to 3.5V

• Sink and source termination regulator includes droop compensation

• Requires minimum output capacitance of 20μF (Typically 3 × 10μF MLCCs) for memory termination applications (DDR)

• PGOOD to monitor output regulation

• EN Input

• REFIN input allows for flexible input tracking either directly or through resistor divider

• Remote sensing (VOSNS)

• ±10mA buffered reference (REFOUT)

• Built-in soft start, UVLO, and OCL

• Thermal shutdown

• Supports DDR, DDR2, DDR3, DDR3L, low-power DDR3, and DDR4 VTT applications

• 10-Pin VSON package with thermal pad

Applications

• Memory termination regulator for DDR, DDR2, DDR3, DDR3L, low-power DDR3 and DDR4

• Notebooks, desktops, and servers

• Telecom and datacom

• Base stations

• LCD-TVs and PDP-TVs

• Copiers and printers

• Set-top boxes

Description

The TPS51200 device is a sink and source double data rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.

The TPS51200 maintains a fast transient response and requires a minimum output capacitance of only 20μF. The TPS51200 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low-Power DDR3 and DDR4 VTT bus termination.

In addition, the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The TPS51200 is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.

INFORMATION

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DDR termination regulator 3A sink/source

VDDQ voltage regulator with VTT accuracy

low IQ DDR regulator SON-10 package

TPS51200DRCR 3A Sink/Source DDR Termination Regulator for VDDQ=1.5V/1.8V/2.5V with VTT=±0.5% Accuracy Reference Buffer & Low IQ in 2mmx2mm SON-10 Images